1234 search results - page 229 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
TPDS
2010
13 years 6 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
PVG
2003
IEEE
14 years 26 days ago
2003
IEEE
While commodity computing and graphics hardware has increased in capacity and dropped in cost, it is still quite difficult to make effective use of such systems for general-purpos...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
IWMM
2010
Springer
13 years 9 months ago
2010
Springer
With the current developments in CPU implementations, it becomes obvious that ever more parallel multicore systems will be used even in embedded controllers that require real-time...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...