1234 search results - page 71 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
BSDCON
2003
13 years 9 months ago
2003
The existing thread scheduler in FreeBSD was well suited towards the computing environment that it was developed in. As the priorities and hardware targets of the project have cha...
RTSS
2008
IEEE
14 years 2 months ago
2008
IEEE
Multicore platforms are predicted to become significantly larger in the coming years. Given that real-time workloads will inevitably be deployed on such platforms, the scalabilit...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
High-level hardware modeling is an essential, yet time-consuming, part of system design. However, effective component-based reuse in hardware modeling languages can reduce model c...
PROCEDIA
2010
13 years 6 months ago
2010
An important issue in the design of visualization systems is to allow flexibility in providing a range of interfaces to a single body of algorithmic software. In this paper we de...
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...