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CCS
2008
ACM
13 years 10 months ago
Avoiding timing channels in fixed-priority schedulers
A practically feasible modification to fixed-priority schedulers allows to avoid timing channels despite threads having access to precise clocks. This modification is rather simpl...
Marcus Völp, Claude-Joachim Hamann, Hermann H...
MSE
2002
IEEE
135views Hardware» more  MSE 2002»
14 years 27 days ago
The Impact of SMT/SMP Designs on Multimedia Software Engineering - A Workload Analysis Study
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
Yen-Kuang Chen, Rainer Lienhart, Eric Debes, Matth...
CODES
2003
IEEE
14 years 1 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
14 years 4 months ago
A realistic variable voltage scheduling model for real-time applications
Voltage scheduling is indispensable for exploiting the benefit of variable voltage processors. Though extensive research has been done in this area, current processor limitations...
Bren Mochocki, Xiaobo Sharon Hu, Gang Quan
EURODAC
1995
IEEE
130views VHDL» more  EURODAC 1995»
13 years 11 months ago
Scalable performance scheduling for hardware-software cosynthesis
The paper presents a static process schedulingapproach as a front-end to hardware-software cosynthesis of small embedded systems which allows global system optimization. Unlike ea...
Thomas Benner, Rolf Ernst, Achim Österling