210 search results - page 16 / 42 » A Self-Reconfigurable Gate Array Architecture |
DFT
1999
IEEE
13 years 12 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
CDES
2008
13 years 9 months ago
2008
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
TCSV
2008
13 years 7 months ago
2008
Abstract--This paper proposes a parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm and applied to the SLAM (...
FPGA
2009
ACM
14 years 2 months ago
2009
ACM
This paper describes an analytical model that relates the architectural parameters of an FPGA to the average prerouting wirelength of an FPGA implementation. Both homogeneous and ...
ISCAS
1993
IEEE
13 years 11 months ago
1993
IEEE
– This paper describes an efficient architecture for FIR filters. By exploiting the reduced complexity made possible by the use of sparse powers-of-two coefficients, an FIR ...