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» A Self-Tuning Configurable Cache
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ISCA
2007
IEEE
182views Hardware» more  ISCA 2007»
14 years 1 months ago
Configurable isolation: building high availability systems with commodity multi-core processors
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...
Nidhi Aggarwal, Parthasarathy Ranganathan, Norman ...
ASPLOS
2010
ACM
13 years 10 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
CDES
2006
78views Hardware» more  CDES 2006»
13 years 8 months ago
The Impact of Cache Organization in Optimizing Microprocessor Power Consumption
In the recent years, power consumption has become increasingly an important design concern as silicon area and performance in modern computer systems design. Several factors have ...
Nagm Mohamed, Nazeih Botros, Wei Zhang
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
13 years 8 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt
CGO
2005
IEEE
14 years 10 days ago
Effective Adaptive Computing Environment Management via Dynamic Optimization
To minimize the surging power consumption of microprocessors, adaptive computing environments (ACEs) where microarchitectural resources can be dynamically tuned to match a program...
Shiwen Hu, Madhavi Gopal Valluri, Lizy Kurian John