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» A Simple Program Transformation for Parallelism
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ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
14 years 1 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis
ICPPW
2008
IEEE
14 years 2 months ago
Non-Contiguous I/O Support for Object-Based Storage
The access patterns performed by disk-intensive applications vary widely, from simple contiguous reads or writes through an entire file to completely unpredictable random access....
Dennis Dalessandro, Ananth Devulapalli, Pete Wycko...
IEEEPACT
2008
IEEE
14 years 2 months ago
Mars: a MapReduce framework on graphics processors
We design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of ...
Bingsheng He, Wenbin Fang, Qiong Luo, Naga K. Govi...
ASPLOS
1991
ACM
13 years 11 months ago
NUMA Policies and Their Relation to Memory Architecture
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
William J. Bolosky, Michael L. Scott, Robert P. Fi...
ICPP
2003
IEEE
14 years 1 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta