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VTS
1996
IEEE
126views Hardware» more  VTS 1996»
13 years 11 months ago
Automatic test generation using genetically-engineered distinguishing sequences
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 12 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
DAC
2008
ACM
14 years 8 months ago
Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM
In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This...
Krishna Bharath, Ege Engin, Madhavan Swaminathan
CEC
2005
IEEE
14 years 1 months ago
Elitist generational genetic chromodynamics - a new radii-based evolutionary algorithm for multimodal optimization
A new radii-based evolutionary algorithm (EA) designed for multimodal optimization problems is proposed. The approach can be placed within the genetic chromodynamics framework and ...
Catalin Stoean, Mike Preuss, Ruxandra Gorunescu, D...
CEC
2007
IEEE
14 years 1 months ago
A Memetic Algorithm for test data generation of Object-Oriented software
— Generating test data for Object-Oriented (OO) software is a hard task. Little work has been done on the subject, and a lot of open problems still need to be investigated. In th...
Andrea Arcuri, Xin Yao