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» A Small Test Generator for Large Designs
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DATE
2007
IEEE
100views Hardware» more  DATE 2007»
14 years 1 months ago
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon W...
TSE
2010
197views more  TSE 2010»
13 years 2 months ago
A Genetic Algorithm-Based Stress Test Requirements Generator Tool and Its Empirical Evaluation
Genetic algorithms (GAs) have been applied previously to UML-driven, stress test requirements generation with the aim of increasing chances of discovering faults relating to networ...
Vahid Garousi
KBSE
2007
IEEE
14 years 1 months ago
Scalable automatic test data generation from modeling diagrams
We explore the automatic generation of test data that respect constraints expressed in the Object-Role Modeling (ORM) language. ORM is a popular conceptual modeling language, prim...
Yannis Smaragdakis, Christoph Csallner, Ranjith Su...
ATS
2003
IEEE
98views Hardware» more  ATS 2003»
14 years 25 days ago
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
ICST
2010
IEEE
13 years 6 months ago
Automated and Scalable T-wise Test Case Generation Strategies for Software Product Lines
Abstract—Software Product Lines (SPL) are difficult to validate due to combinatorics induced by variability across their features. This leads to combinatorial explosion of the n...
Gilles Perrouin, Sagar Sen, Jacques Klein, Benoit ...