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» A Small Test Generator for Large Designs
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CODES
2008
IEEE
13 years 9 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
FGR
2000
IEEE
150views Biometrics» more  FGR 2000»
13 years 12 months ago
From Few to Many: Generative Models for Recognition Under Variable Pose and Illumination
Image variability due to changes in pose and illumination can seriously impair object recognition. This paper presents appearance-based methods which, unlike previous appearance-b...
Athinodoros S. Georghiades, Peter N. Belhumeur, Da...
GLVLSI
2009
IEEE
172views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Contact merging algorithm for efficient substrate noise analysis in large scale circuits
A methodology is proposed to efficiently estimate the substrate noise generated by large scale aggressor circuits. Small spatial voltage differences within the ground distribution...
Emre Salman, Renatas Jakushokas, Eby G. Friedman, ...
SIGSOFT
1998
ACM
13 years 11 months ago
Further Empirical Studies of Test Effectiveness
This paper reports on an empirical evaluation of the fault-detecting ability of two white-box software testing techniques: decision coverage (branch testing) and the all-uses data...
Phyllis G. Frankl, Oleg Iakounenko
ITC
1997
IEEE
129views Hardware» more  ITC 1997»
13 years 11 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...