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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 2 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
CODES
2003
IEEE
14 years 1 months ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
ECRTS
2002
IEEE
14 years 25 days ago
'QoS Safe' Kernel Extensions for Real-Time Resource Management
General-purpose operating systems are ill-equipped to meet the quality of service (QoS) requirements of complex real-time applications. Consequently, many classes of realtime appl...
Richard West, Jason Gloudon
KR
1998
Springer
14 years 2 days ago
Combining Narratives
A theory is elaboration tolerant to the extent that new information can be incorporated with only simple changes. The simplest change is conjoining new information, and only conju...
John McCarthy, Tom Costello
TOPLAS
2008
138views more  TOPLAS 2008»
13 years 7 months ago
Decomposing bytecode verification by abstract interpretation
act Interpretation C. BERNARDESCHI, N. DE FRANCESCO, G. LETTIERI, L. MARTINI, and P. MASCI Universit`a di Pisa Bytecode verification is a key point in the security chain of the Jav...
Cinzia Bernardeschi, Nicoletta De Francesco, Giuse...