Sciweavers

543 search results - page 18 / 109
» A Structured Methodology for System-on-an-FPGA Design
Sort
View
ISLPED
2010
ACM
193views Hardware» more  ISLPED 2010»
13 years 9 months ago
PASAP: power aware structured ASIC placement
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Ashutosh Chakraborty, David Z. Pan
CODES
2004
IEEE
14 years 22 days ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
EH
2004
IEEE
98views Hardware» more  EH 2004»
14 years 22 days ago
Self-Replication of 3D Universal Structures
After a survey of some realizations of self-replicating machines, this paper presents the construction based selfreplication of universal 3D structures. This self-replication proc...
André Stauffer, Daniel Mange, Enrico Petrag...
SAC
2002
ACM
13 years 8 months ago
A modular approach to build structured event-based systems
Event-based systems are developed and used as a coordination model to integrate components in loosely coupled systems. Research and product development focused so far on efficienc...
Ludger Fiege, Gero Mühl, Felix C. Gärtne...
ICCAD
2001
IEEE
185views Hardware» more  ICCAD 2001»
14 years 5 months ago
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Diana Marculescu, Anoop Iyer