Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
After a survey of some realizations of self-replicating machines, this paper presents the construction based selfreplication of universal 3D structures. This self-replication proc...
Event-based systems are developed and used as a coordination model to integrate components in loosely coupled systems. Research and product development focused so far on efficienc...
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...