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» A Structured Methodology for System-on-an-FPGA Design
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CORR
2010
Springer
140views Education» more  CORR 2010»
13 years 9 months ago
Performance Bounds and Design Criteria for Estimating Finite Rate of Innovation Signals
In this paper, we consider the problem of estimating finite rate of innovation (FRI) signals from noisy measurements, and specifically analyze the interaction between FRI technique...
Zvika Ben-Haim, Tomer Michaeli, Yonina C. Eldar
DAC
2011
ACM
12 years 8 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
MEMOCODE
2007
IEEE
14 years 3 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
14 years 1 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...
EGH
2009
Springer
13 years 6 months ago
Parallel view-dependent tessellation of Catmull-Clark subdivision surfaces
We present a strategy for performing view-adaptive, crack-free tessellation of Catmull-Clark subdivision surfaces entirely on programmable graphics hardware. Our scheme extends th...
Anjul Patney, Mohamed S. Ebeida, John D. Owens