153 search results - page 3 / 31 » A Study of Design Efficiency with a High-Level Language for ... |
JSA
2007
13 years 7 months ago
2007
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
ERSA
2008
13 years 9 months ago
2008
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...