226 search results - page 16 / 46 » A Study on Impact of Leakage Current on Dynamic Power |
DAC
2008
ACM
14 years 9 months ago
2008
ACM
Recently, processor power density has been increasing at an alarming rate resulting in high on-chip temperature. Higher temperature increases current leakage and causes poor relia...
PAM
2007
Springer
14 years 2 months ago
2007
Springer
Modern cellular channels in 3G networks incorporate sophisticated power control and dynamic rate adaptation which can have a significant impact on adaptive transport layer protoco...
CASES
2006
ACM
14 years 15 days ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
TCAD
2008
13 years 8 months ago
2008
Abstract--Design of a suitable power gating (e.g., multithreshold CMOS or super cutoff CMOS) structure is an important and challenging task in sub-90nm VLSI circuits where leakage ...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...