60 search results - page 9 / 12 » A System for Synthesizing Optimized FPGA Hardware from MATLA... |
FPL
2004
Springer
13 years 11 months ago
2004
Springer
In this paper, we develop a unified theory in analyzing optimal switch box design problems, particularly for the unsolved irregular cases, where different pin counts are allowed on...
ERSA
2006
13 years 9 months ago
2006
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
HOTI
2005
IEEE
14 years 1 months ago
2005
IEEE
Intrusion rule processing in reconfigurable hardware enables intrusion detection and prevention services to run at multi Gigabit/second rates. High-level intrusion rules mapped d...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
FPL
2000
Springer
13 years 11 months ago
2000
Springer
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...