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» A Systematic Process to Design Product Line Architecture
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CODES
2004
IEEE
13 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
SIGSAND
2008
13 years 9 months ago
Relational Model Driven Application Design
Abstract: A closer look at typical information systems shows that relatively simple routines often contribute significantly to the overall expenses of the software development proc...
Michael Guckert, René Gerlach
ECBS
2007
IEEE
135views Hardware» more  ECBS 2007»
14 years 2 months ago
Introducing Impact Analysis for Architectural Decisions
Architectural quality constitutes a critical factor for contemporary software systems, especially because of their size and the needs for frequent, quick changes. For success-crit...
Matthias Riebisch, Sven Wohlfarth
ICS
2009
Tsinghua U.
14 years 2 months ago
Towards 100 gbit/s ethernet: multicore-based parallel communication protocol design
Ethernet line rates are projected to reach 100 Gbits/s by as soon as 2010. While in principle suitable for high performance clustered and parallel applications, Ethernet requires ...
Stavros Passas, Kostas Magoutis, Angelos Bilas
JCIT
2010
99views more  JCIT 2010»
13 years 2 months ago
A Product Knowledge-Sharing System Focusing on Internet-mediated Mode
This research constructs a design-oriented, Internet-mediated, and knowledge-sharing architecture. Therein XML files serve as the basic exchange and storage format of knowledge te...
Hsin-Hsi Lai, Heng-Chang Lin, Yu-Cheng Chen