106 search results - page 7 / 22 » A Task-Centric Memory Model for Scalable Accelerator Archite... |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
Partitioned Global Address Space (PGAS) languages provide a unique programming model that can span shared-memory multiprocessor (SMP) architectures, distributed memory machines, o...
SIPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Low Density Parity Check (LDPC) codes are one of the most promising error correction codes that are being adopted by many wireless standards. This paper presents a case study for ...
SC
2004
ACM
14 years 1 months ago
2004
ACM
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...
RSP
2008
IEEE
14 years 2 months ago
2008
IEEE
Current graphic cards include advanced graphic processing units to accelerate the rendering of 3D objects with millions of polygons. As object models grow in complexity, the rende...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...