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ISCAS
2008
IEEE
88views Hardware» more  ISCAS 2008»
14 years 2 months ago
An improved method of power control with CMOS class-E power amplifiers
—In this paper, an improved method of power control is introduced to widen the range of output power with high efficiency. Two CMOS class-E power amplifiers (PA) with different o...
Tongqiang Gao, Chun Zhang, Baoyong Chi, Zhihua Wan...
ICCD
1996
IEEE
108views Hardware» more  ICCD 1996»
14 years 1 days ago
Module Generators for a Regular Analog Layout
In general, automatic layout composition techniques based on pre-designed devices facilitate the production of small IC numbers by prefabricating their basic structures. They also...
J. Kampe, C. Wisser, G. Scarbata
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Fast Analytic Placement using Minimum Cost Flow
Many current integrated circuits designs, such as those released for the ISPD2005[14] placement contest, are extremely large and can contain a great deal of white space. These new...
Ameya R. Agnihotri, Patrick H. Madden
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
14 years 1 months ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon
ITC
1993
IEEE
110views Hardware» more  ITC 1993»
14 years 11 hour ago
Novel Test Pattern Generators for Pseudo-Exhaustive Testing
ÐPseudoexhaustive testing of a combinational circuit involves applying all possible input patterns to all its individual output cones. The testing ensures detection of all detecta...
Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A...