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IPPS
2007
IEEE
14 years 2 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
INFOVIS
2005
IEEE
14 years 1 months ago
Elastic Hierarchies: Combining Treemaps and Node-Link Diagrams
We investigate the use of elastic hierarchies for representing trees, where a single graphical depiction uses a hybrid mixture, or “interleaving”, of more basic forms at diffe...
Shengdong Zhao, Michael J. McGuffin, Mark H. Chign...
DAC
2000
ACM
14 years 9 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...
CHI
2004
ACM
14 years 8 months ago
Gummi: a bendable computer
Gummi is an interaction technique and device concept based on physical deformation of a handheld device. The device consists of several layers of flexible electronic components, i...
Carsten Schwesig, Ivan Poupyrev, Eijiro Mori
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
14 years 8 days ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi