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» A Temporal Language for SystemC
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MSE
2003
IEEE
92views Hardware» more  MSE 2003»
13 years 12 months ago
On simulating the IP Market Dynamics in an Academic Environment Using SystemC
As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the hightech industry. To prepare for this future t...
Ghaiyyur Quraishi, Ravi Shankar
FDL
2005
IEEE
14 years 9 days ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
ISVLSI
2007
IEEE
230views VLSI» more  ISVLSI 2007»
14 years 29 days ago
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...
Richard Maciel, Bruno Albertini, Sandro Rigo, Guid...
SAMOS
2004
Springer
14 years 1 days ago
A High-Level Programming Paradigm for SystemC
The SystemC language plays an increasingly important role in the system-level design domain, facilitating designers to start with modeling and simulating system components and thei...
Mark Thompson, Andy D. Pimentel
FDL
2008
IEEE
14 years 1 months ago
Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models
—In this paper, we propose a quasi-static scheduling (QSS) method applicable to actor-oriented SystemC designs. QSS determines a schedule where several static schedules are combi...
Jens Gladigau, Christian Haubelt, Jürgen Teic...