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» A Temporal Language for SystemC
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FDL
2003
IEEE
14 years 2 hour ago
Analog Circuit Modeling in SystemC
This paper proposes a methodology for the extension of SystemC to mixed signal systems. An oscillator made up of an inverter chain has been used to test the accuracy and stability...
Massimo Conti, Marco Caldari, Simone Orcioni, Gior...
FDL
2005
IEEE
14 years 9 days ago
Incorporating SystemC in Analog/Mixed-Signal Design Flow
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
Patrick Birrer, Walter Hartong
FDL
2003
IEEE
14 years 2 hour ago
Synchronization of analogue and digital solvers in mixed-signal simulation on a SystemC platform
This contribution proposes a synchronization technique for solvers able to handle analogue extensions to SystemC, for modelling of general, mixed-mode systems with digital and non...
Tom J. Kazmierski, Hessa Al-Junaid
SIES
2008
IEEE
14 years 1 months ago
Scalably distributed SystemC simulation for embedded applications
SystemC becomes popular as an efficient system-level modelling language and simulation platform. However, the solethread simulation kernel obstacles its performance progress from ...
Kai Huang, Iuliana Bacivarov, Fabian Hugelshofer, ...
DAC
2006
ACM
14 years 20 days ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan