60 search results - page 9 / 12 » A Test Point Insertion Algorithm for Mixed-Signal Circuits |
ARITH
2007
IEEE
14 years 1 months ago
2007
IEEE
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
EH
2002
IEEE
14 years 12 days ago
2002
IEEE
The purpose of this paper is twofold: first, to illustrate a stand-alone board-level evolvable system (SABLES) and its performance, and second to illustrate some problems that occ...
SODA
1993
ACM
13 years 8 months ago
1993
ACM
We introduce a new method for nding several types of optimal k-point sets, minimizing perimeter, diameter, circumradius, and related measures, by testing sets of the O(k) nearest ...
ET
2002
13 years 7 months ago
2002
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
SP
2007
IEEE
14 years 1 months ago
2007
IEEE
Hardware manufacturers are increasingly outsourcing their IC fabrication work overseas due to much lower costs. This poses a significant security risk for ICs used for critical m...