264 search results - page 20 / 53 » A Time Predictable Instruction Cache for a Java Processor |
127
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EUROPAR
1999
Springer
15 years 6 months ago
1999
Springer
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
115
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EUC
2006
Springer
15 years 5 months ago
2006
Springer
Certain hard real-time tasks demand precise timing of events, but the usual software solution of periodic interrupts driving a scheduler only provides precision in the millisecond ...
130
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PLDI
2005
ACM
15 years 7 months ago
2005
ACM
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
132
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GLVLSI
2005
IEEE
15 years 7 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
142
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ISCAPDCS
2007
15 years 3 months ago
2007
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...