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» A Time Predictable Instruction Cache for a Java Processor
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RTAS
2006
IEEE
14 years 2 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
RTSS
2007
IEEE
14 years 2 months ago
Bus Access Optimization for Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
Jakob Rosen, Alexandru Andrei, Petru Eles, Zebo Pe...
VLSID
2008
IEEE
151views VLSI» more  VLSID 2008»
14 years 9 months ago
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Ros...
ISCA
1999
IEEE
90views Hardware» more  ISCA 1999»
14 years 28 days ago
Correlated Load-Address Predictors
As microprocessors become faster, the relative performance cost of memory accesses increases. Bigger and faster caches significantly reduce the absolute load-to-use time delay. Ho...
Michael Bekerman, Stéphan Jourdan, Ronny Ro...
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
14 years 1 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue