264 search results - page 45 / 53 » A Time Predictable Instruction Cache for a Java Processor |
EMSOFT
2010
Springer
13 years 6 months ago
2010
Springer
We propose the first polynomial-time code selection algorithm for minimising the worst-case execution time of a nonnested loop executed on a fully pipelined processor that uses sc...
ISSS
2000
IEEE
14 years 1 months ago
2000
IEEE
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
ICPPW
2005
IEEE
14 years 2 months ago
2005
IEEE
High-performance computing is essential for solving large problems and for reducing the time to solution for a single problem. Current top high-performance computing systems conta...
INFOCOM
2002
IEEE
14 years 1 months ago
2002
IEEE
—To provide flexibility in deploying new protocols and services, general-purpose processing engines are being placed in the datapath of routers. Such network processors are typi...
IEEEPACT
2008
IEEE
14 years 3 months ago
2008
IEEE
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...