Real-time content-based access to live video data requires content analysis applications that are able to process the video data at least as fast as the video data is made availab...
Viktor S. Wold Eide, Frank Eliassen, Ole-Christoff...
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
This paper presents the main concepts of the IST Project FAIN "Future Active IP Networks" [10], a three-year collaborative research project, whose main task is to develo...
Alex Galis, Bernhard Plattner, Jonathan M. Smith, ...
Existing parallel or remote rendering solutions rely on communicating pixels, OpenGL commands, scene-graph changes or application-specific data. We propose an intermediate soluti...
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...