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» A Transactional Architecture for Simulation
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SIES
2009
IEEE
16 years 11 days ago
A modular fast simulation framework for stream-oriented MPSoC
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...
IPPS
2007
IEEE
15 years 12 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
167
Voted
DAC
1998
ACM
15 years 10 months ago
Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation
This paper presents a general method for computing transient sensitivities using the adjoint method in event driven simulation algorithms that employ piecewise linear device model...
Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov
138
Voted
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 9 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
WSC
2004
15 years 7 months ago
Approaches for Modeling Individuals Within Organizational Simulations
The human behavior modeling community has traditionally been divided into those addressing individual behavior models, and those addressing organizational and team models. And yet...
Eva Hudlicka, Greg L. Zacharias