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» A Transitive Closure Based Algorithm for Test Generation
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ETS
2006
IEEE
119views Hardware» more  ETS 2006»
14 years 1 months ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
EURODAC
1990
IEEE
92views VHDL» more  EURODAC 1990»
13 years 11 months ago
Accelerated test pattern generation by cone-oriented circuit partitioning
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
Torsten Grüning, Udo Mahlstedt, Wilfried Daeh...
SIGSOFT
2007
ACM
14 years 8 months ago
Improving test case generation for web applications using automated interface discovery
With the growing complexity of web applications, identifying web interfaces that can be used for testing such applications has become increasingly challenging. Many techniques tha...
William G. J. Halfond, Alessandro Orso
ICST
2010
IEEE
13 years 6 months ago
Timed Moore Automata: Test Data Generation and Model Checking
Abstract—In this paper we introduce Timed Moore Automata, a specification formalism which is used in industrial train control applications for specifying the real-time behavior ...
Helge Löding, Jan Peleska
ICST
2009
IEEE
14 years 2 months ago
PKorat: Parallel Generation of Structurally Complex Test Inputs
Constraint solving lies at the heart of several specification-based approaches to automated testing. Korat is a previously developed algorithm for solving constraints in Java pro...
Junaid Haroon Siddiqui, Sarfraz Khurshid