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» A Type System Equivalent to a Model Checker
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DAC
1996
ACM
13 years 11 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
FORMATS
2004
Springer
14 years 25 days ago
Bounded Model Checking for Region Automata
For successful software verification, model checkers must be capable of handling a large number of program variables. Traditional, BDD-based model checking is deficient in this reg...
Fang Yu, Bow-Yaw Wang, Yao-Wen Huang
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 11 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
DALT
2004
Springer
14 years 25 days ago
Model Checking Agent Dialogues
In this paper we address the challenges associated with the verification of correctness of communication between agents in MultiAgent Systems. Our approach applies model-checking ...
Christopher D. Walton
SIGSOFT
2006
ACM
14 years 1 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar