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» A Visual Approach to Validating System Level Designs
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ICCAD
2002
IEEE
80views Hardware» more  ICCAD 2002»
14 years 5 months ago
Minimizing power across multiple technology and design levels
Approaches to achieve low-power and high-speed VLSI's are described with the emphasis on techniques across multiple technology and design levels. To suppress the leakage curr...
Takayasu Sakurai
TOMACS
1998
140views more  TOMACS 1998»
13 years 8 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 5 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
14 years 2 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
ICRA
2000
IEEE
78views Robotics» more  ICRA 2000»
14 years 1 months ago
Hybrid System Design for Singularityless Task Level Robot Controllers
This paper presents a hybrid system approach in the design of a singularityless task level controller. To achieve a singularityless motion control in the neighborhood of singulari...
Jindong Tan, Ning Xi