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» A Visual Approach to Validating System Level Designs
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RTCSA
2005
IEEE
14 years 2 months ago
Using UML 2.0 for System Level Design of Real Time SoC Platforms for Stream Processing
While enabling fast implementation and reconfiguration of stream applications, programmable stream processors expose issues of incompatibility and lack of adoption in existing st...
Yongxin Zhu, Zhenxin Sun, Alexander Maxiaguine, We...
IEICET
2006
114views more  IEICET 2006»
13 years 8 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
ICCD
2008
IEEE
221views Hardware» more  ICCD 2008»
14 years 5 months ago
Reversi: Post-silicon validation system for modern microprocessors
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
Ilya Wagner, Valeria Bertacco
NOMS
2002
IEEE
130views Communications» more  NOMS 2002»
14 years 1 months ago
Design of a network level management information model for automatically switched transport networks
The concept of Automatically Switched Transport Networks (ASTN) combines elements of distributed connection management from the IP world with classical transport network functiona...
Georg Lehr, Ulrike Hartmer, Ralf Geerdsen
MICCAI
2009
Springer
14 years 6 months ago
A Two-Level Approach Towards Semantic Colon Segmentation: Removing Extra-Colonic Findings
Abstract. Computer aided detection (CAD) of colonic polyps in computed tomographic colonography has tremendously impacted colorectal cancer diagnosis using 3D medical imaging. It i...
Le Lu, Matthias Wolf, Jianming Liang, Murat Dundar...