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» A Visual Approach to Validating System Level Designs
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CODES
2005
IEEE
15 years 8 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
HIPEAC
2010
Springer
15 years 4 months ago
Improving Performance by Reducing Aborts in Hardware Transactional Memory
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
Mohammad Ansari, Behram Khan, Mikel Luján, ...
CASES
2005
ACM
15 years 4 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...
140
Voted
ICPP
2002
IEEE
15 years 7 months ago
Pattern-Based Parallel Programming
The advantages of pattern-based programming have been well-documented in the sequential literature. However patterns have yet to make their way into mainstream parallel computing,...
Steven Bromling, Steve MacDonald, John Anvik, Jona...
136
Voted
ECTEL
2007
Springer
15 years 8 months ago
Scruffy Technologies to Enable (Work-integrated) Learning
Abstract. The goal of the APOSDLE (Advanced Process-Oriented SelfDirected Learning environment) project is to support work-integrated learning of knowledge workers. We argue that w...
Stefanie N. Lindstaedt, Peter Scheir, Armin Ulbric...