2695 search results - page 478 / 539 » A Visual Approach to Validating System Level Designs |
157
Voted
DAC
2010
ACM
15 years 5 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
109
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KDD
2008
ACM
16 years 2 months ago
2008
ACM
In some applications such as filling in a customer information form on the web, some missing values may not be explicitly represented as such, but instead appear as potentially va...
105
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ICCAD
2006
IEEE
15 years 11 months ago
2006
IEEE
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
135
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AOSD
2009
ACM
15 years 9 months ago
2009
ACM
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
130
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CODES
2008
IEEE
15 years 9 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...