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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
14 years 7 months ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
IWPC
2009
IEEE
14 years 4 months ago
Reading the documentation of invoked API functions in program comprehension
Comprehending an unfamiliar code fragment requires an awareness of explicit usage directives that may be present in the documentation of some invoked functions. Since it is not pr...
Uri Dekel, James D. Herbsleb
LCN
2008
IEEE
14 years 4 months ago
DiCAP: Distributed Packet Capturing architecture for high-speed network links
— IP traffic measurements form the basis of several network management tasks, such as accounting, planning, intrusion detection, and charging. High-speed network links challenge ...
Cristian Morariu, Burkhard Stiller
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
14 years 4 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
INFOCOM
2007
IEEE
14 years 4 months ago
A Suite of Schemes for User-Level Network Diagnosis without Infrastructure
—It is highly desirable and important for end users, with no special privileges, identify and pinpoint faults inside the network that degrade the performance of their application...
Yao Zhao, Yan Chen