This work deals with the scheduling problem of a directed acyclic graph with interprocessor communication delays. The objective is to minimize the makespan, taking into account the...
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...
Abstract. Several tools have been developed for the estimation of software reliability. However, they are highly specialized in the approaches they implement and the particular pha...
Real-world workloads rarely saturate multi-core processor. CPU C-states can be used to reduce power consumption during processor idle time. The key unsolved problem is: when and h...