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» A cis-regulatory logic simulator
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DAC
2006
ACM
14 years 9 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
14 years 3 months ago
Timing simulation of interconnected AUTOSAR software-components
AUTOSAR is a recent specification initiative which focuses on a model-driven architecture like methodology for automotive applications. However, needed engineering steps, or how-t...
Matthias Krause, Oliver Bringmann, André He...
VTS
2002
IEEE
101views Hardware» more  VTS 2002»
14 years 1 months ago
Speeding Up The Byzantine Fault Diagnosis Using Symbolic Simulation
Fault diagnosis is to predict the potential fault sites in a logic IC. In this paper, we particularly address the problem of diagnosing faults that exhibit the so-called Byzantine...
Shi-Yu Huang
AICCSA
2001
IEEE
131views Hardware» more  AICCSA 2001»
14 years 9 days ago
Modeling Resources in a UML-Based Simulative Environment
The importance of early performance assessment grows as software systems increase in terms of size, logical distribution and interaction complexity. Lack of time from the side of ...
Hany H. Ammar, Vittorio Cortellessa, Alaa Ibrahim
INFSOF
2006
158views more  INFSOF 2006»
13 years 8 months ago
DEVSpecL: DEVS specification language for modeling, simulation and analysis of discrete event systems
Discrete EVent Systems Specification (DEVS) formalism supports specification of discrete event models in a hierarchical modular manner. This paper proposes a DEVS modeling languag...
Ki Jung Hong, Tag Gon Kim