1008 search results - page 56 / 202 » A cis-regulatory logic simulator |
CSL
2004
Springer
14 years 2 months ago
2004
Springer
In the refinement calculus, monotonic predicate transformers are used to model specifications for (imperative) programs. Together with a natural notion of simulation, they form a...
EH
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper, we perform a comparative study of different heuristics used to design combinational logic circuits. The use of local search hybridized with a genetic algorithm and ...
CAV
2003
Springer
14 years 1 months ago
2003
Springer
We consider the problem of reasoning with linear temporal logic on truncated paths. A truncated path is a path that is finite, but not necessarily maximal. Truncated paths arise n...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
CHES
2005
Springer
14 years 2 months ago
2005
Springer
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate...