1008 search results - page 57 / 202 » A cis-regulatory logic simulator |
ROBOCUP
2001
Springer
14 years 1 months ago
2001
Springer
This paper presents an evolutionary approach to learning a fuzzy logic controller(FLC) employed for reactive behaviour control of Sony legged robots. The learning scheme is divided...
ISMVL
2000
IEEE
14 years 1 months ago
2000
IEEE
We present a novel multiple-threshold circuit using resonant-tunneling diodes (RTDs). The logic operation is based on detecting a switching sequence in the RTD circuit. This schem...
ASPDAC
2001
ACM
14 years 11 days ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
FPGA
2008
ACM
13 years 10 months ago
2008
ACM
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
GECCO
2009
Springer
14 years 3 months ago
2009
Springer
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...