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ISSS
2002
IEEE
154views Hardware» more  ISSS 2002»
14 years 17 days ago
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops
Software pipelining and unfolding are commonly used techniques to increase parallelism for DSP applications. However, these techniques expand the code size of the application sign...
Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edw...
ICECCS
2002
IEEE
161views Hardware» more  ICECCS 2002»
14 years 18 days ago
Interclass Testing of Object Oriented Software
The characteristics of object-oriented software affect type and relevance of faults. In particular, the state of the objects may cause faults that cannot be easily revealed with t...
Vincenzo Martena, Alessandro Orso, Mauro Pezz&egra...
SBACPAD
2004
IEEE
124views Hardware» more  SBACPAD 2004»
13 years 9 months ago
Improving Parallel Execution Time of Sorting on Heterogeneous Clusters
The aim of the paper is to introduce techniques in order to optimize the parallel execution time of sorting on heterogeneous platforms (processors speeds are related by a constant...
Christophe Cérin, Michel Koskas, Hazem Fkai...
CCGRID
2008
IEEE
14 years 2 months ago
Optimized Distributed Data Sharing Substrate in Multi-core Commodity Clusters: A Comprehensive Study with Applications
Distributed applications tend to have a complex design due to issues such as concurrency, synchronization and communication. Researchers in the past have proposed abstractions to ...
Karthikeyan Vaidyanathan, Ping Lai, Sundeep Narrav...
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...