Sciweavers

479 search results - page 34 / 96
» A clustering technique to optimize hardware software synchro...
Sort
View
DAC
2008
ACM
14 years 8 months ago
Scan chain clustering for test power reduction
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
ICDE
1996
IEEE
157views Database» more  ICDE 1996»
14 years 9 months ago
High Availability in Clustered Multimedia Servers
Clustered multimedia servers, consisting of interconnected nodes and disks, have been proposed for large scale servers, that are capable of supporting multiple concurrent streams ...
Renu Tewari, Daniel M. Dias, Rajat Mukherjee, Harr...
EMSOFT
2007
Springer
14 years 1 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou
DAC
2006
ACM
14 years 8 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
14 years 18 days ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng