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» A code compression advisory tool for embedded processors
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SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 1 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
MICRO
1997
IEEE
87views Hardware» more  MICRO 1997»
13 years 11 months ago
Improving Code Density Using Compression Techniques
We propose a method for compressing programs in embedded processors where instruction memory size dominates cost. A post-compilation analyzer examines a program and replaces commo...
Charles Lefurgy, Peter L. Bird, I-Cheng K. Chen, T...
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
14 years 1 months ago
Dictionary-based program compression on transport triggered architectures
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
Jari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, ...
LCTRTS
2007
Springer
14 years 1 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...
ASAP
2003
IEEE
141views Hardware» more  ASAP 2003»
14 years 27 days ago
Automatic Instruction Set Extension and Utilization for Embedded Processors
There is a growing demand for application-specific embedded processors in system-on-a-chip designs. Current tools and design methodologies often require designers to manually spec...
Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giov...