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» A code compression advisory tool for embedded processors
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RSP
2005
IEEE
107views Control Systems» more  RSP 2005»
14 years 1 months ago
Rapid Prototyping of Embedded Software Using Selective Formalism
Our software synthesis tool, CSP++, generates C++ source code from verifiable CSPm specifications, and includes a framework for runtime execution. Our technique of selective for...
John D. Carter, Ming Xu, William B. Gardner
CODES
2006
IEEE
14 years 1 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
IPPS
2007
IEEE
14 years 1 months ago
Integrated Environment for Embedded Control Systems Design
The motivation of our work is to make a design tool for distributed embedded systems compliant with HIS and AUTOSAR. The tool is based on Processor Expert, a component oriented de...
Roman Bartosinski, Zdenek Hanzálek, Petr St...
SAMOS
2010
Springer
13 years 6 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham
SBACPAD
2009
IEEE
155views Hardware» more  SBACPAD 2009»
14 years 2 months ago
SPARC16: A New Compression Approach for the SPARC Architecture
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...