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» A comparative study of power efficient SRAM designs
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VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 1 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ISPAN
2000
IEEE
14 years 2 days ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
DAC
2005
ACM
14 years 8 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
ISLPED
2010
ACM
128views Hardware» more  ISLPED 2010»
13 years 5 months ago
Rank-aware cache replacement and write buffering to improve DRAM energy efficiency
DRAM power and energy efficiency considerations are becoming increasingly important for low-power and mobile systems. Using lower power modes provided by commodity DRAM chips redu...
Ahmed M. Amin, Zeshan Chishti
BMCBI
2008
107views more  BMCBI 2008»
13 years 7 months ago
A mixture model approach to sample size estimation in two-sample comparative microarray experiments
Background: Choosing the appropriate sample size is an important step in the design of a microarray experiment, and recently methods have been proposed that estimate sample sizes ...
Tommy S. Jørstad, Herman Midelfart, Atle M....