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» A comparative study of power efficient SRAM designs
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NAACL
2003
13 years 9 months ago
Evaluating the Evaluation: A Case Study Using the TREC 2002 Question Answering Track
Evaluating competing technologies on a common problem set is a powerful way to improve the state of the art and hasten technology transfer. Yet poorly designed evaluations can was...
Ellen M. Voorhees
CODES
2004
IEEE
13 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
SAMOS
2007
Springer
14 years 1 months ago
Design Space Exploration of Configuration Manager for Network Processing Applications
—Current FPGAs provide a powerful platform for network processing applications. The main challenge is the exploitation of the reconfiguration to increase the performance of the s...
Christoforos Kachris, Stamatis Vassiliadis
CCS
2009
ACM
14 years 8 months ago
PBES: a policy based encryption system with application to data sharing in the power grid
In distributed systems users need the ability to share sensitive content with multiple other recipients based on their ability to satisfy arbitrary policies. One such system is el...
Rakeshbabu Bobba, Himanshu Khurana, Musab AlTurki,...
FPGA
2004
ACM
116views FPGA» more  FPGA 2004»
14 years 1 months ago
Low-power technology mapping for FPGA architectures with dual supply voltages
In this paper we study the technology mapping problem of FPGA architectures with dual supply voltages (Vdds) for power optimization. This is done with the guarantee that the mappi...
Deming Chen, Jason Cong, Fei Li, Lei He