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» A comparative study of power efficient SRAM designs
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FDL
2004
IEEE
13 years 11 months ago
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip
Reconfigurability is becoming an important part of System-on-Chip (SoC) design to cope with the increasing demands for simultaneous flexibility and computational power. Current ha...
Kari Tiensyrjä, Miroslav Cupák, Kostas...
EUROPAR
2010
Springer
13 years 9 months ago
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao...
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
14 years 2 months ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
14 years 1 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
CDC
2010
IEEE
129views Control Systems» more  CDC 2010»
13 years 2 months ago
On optimal input signal design for frequency response estimation
This paper studies optimal input excitation design for parametric frequency response estimation. We will focus on least-squares estimation of Finite Impulse Response (FIR) models a...
Bo Wahlberg, Håkan Hjalmarsson, Petre Stoica