144 search results - page 15 / 29 » A compiler framework for the reduction of worst-case executi... |
GTTSE
2007
Springer
14 years 1 months ago
2007
Springer
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...
HIPEAC
2007
Springer
14 years 1 months ago
2007
Springer
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. Understanding program behavior is at the foundation of program optimization. Techniques for automatic recognition of program constructs characterize the behavior of code ...