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DAC
1999
ACM
14 years 12 days ago
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung
CCS
2004
ACM
14 years 1 months ago
MAC and UML for secure software design
Security must be a first class citizen in the design of large scale, interacting, software applications, at early and all stages of the lifecycle, for accurate and precise policy ...
Thuong Doan, Steven A. Demurjian, T. C. Ting, Andr...
EUROPAR
2003
Springer
14 years 1 months ago
Obtaining Hardware Performance Metrics for the BlueGene/L Supercomputer
Hardware performance monitoring is the basis of modern performance analysis tools for application optimization. We are interested in providing such performance analysis tools for t...
Pedro Mindlin, José R. Brunheroto, Luiz De ...
CHI
2010
ACM
14 years 2 months ago
A strategy-centric approach to the design of end-user debugging tools
End-user programmers’ code is notoriously buggy. This problem is amplified by the increasing complexity of end users’ programs. To help end users catch errors early and reliab...
Valentina Grigoreanu, Margaret M. Burnett, George ...
ICS
2007
Tsinghua U.
14 years 2 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev