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» A datapath synthesis system for the reconfigurable datapath ...
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ICS
1989
Tsinghua U.
13 years 11 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu
DAC
2003
ACM
14 years 8 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
IEEEPACT
2005
IEEE
14 years 1 months ago
A Distributed Control Path Architecture for VLIW Processors
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...
FPL
2007
Springer
190views Hardware» more  FPL 2007»
14 years 1 months ago
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems
Today’s heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of thes...
Andreas Herrholz, Frank Oppenheimer, Philipp A. Ha...
SIGSOFT
2008
ACM
14 years 8 months ago
Towards compositional synthesis of evolving systems
Synthesis of system configurations from a given set of features is an important and very challenging problem. This paper makes a step towards this goal by describing an efficient ...
Shiva Nejati, Mehrdad Sabetzadeh, Marsha Chechik, ...