We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
Abstract—Opportunistic wireless channel access by nonlicensed users has emerged as a promising solution for addressing the bandwidth scarcity challenge. Auctions represent a natu...
Abstract— In this paper we consider several problems involving control with limited actuation and sampling rates. Event-based control has emerged as an attractive approach for ad...
Background: An adequate and expressive ontological representation of biological organisms and their parts requires formal reasoning mechanisms for their relations of physical aggr...