Sciweavers

1013 search results - page 44 / 203
» A hardware implementation of realloc function
Sort
View
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
14 years 8 days ago
Functional Test Generation for Full Scan Circuits
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
Irith Pomeranz, Sudhakar M. Reddy
ISCAS
1999
IEEE
109views Hardware» more  ISCAS 1999»
14 years 4 days ago
Solution of vector partial differential equations by transfer function models
Transfer function models for the descriptionof physical systems have recently been introduced to the field of multidimensional digital signal processing. They provide an alternati...
Rudolf Rabenstein, Lutz Trautmann
AFRICACRYPT
2008
Springer
14 years 2 months ago
Implementation of the AES-128 on Virtex-5 FPGAs
Abstract. This paper presents an updated implementation of the Advanced Encryption Standard (AES) on the recent Xilinx Virtex-5 FPGAs. We show how a modified slice structure in th...
Philippe Bulens, François-Xavier Standaert,...
ISMVL
2008
IEEE
148views Hardware» more  ISMVL 2008»
14 years 2 months ago
Quantum Logic Implementation of Unary Arithmetic Operations
The mathematical property of inheritance for certain unary fixed point operations has recently been exploited to enable the efficient formulation of arithmetic algorithms and circ...
Mitchell A. Thornton, David W. Matula, Laura Spenn...
EUROMICRO
2006
IEEE
14 years 1 months ago
Using WS-BPEL to Implement Software Fault Tolerance for Web Services
One area of the web services architecture yet to be standardised is that of fault tolerance for services. At the same time, WS-BPEL is moving from a de facto standard to an OASIS ...
Glen Dobson